1. Field of the Invention
This invention relates to a decoding apparatus, particularly to a decoding apparatus for decoding a signal reproduced from an optical disc.
2. Description of the Prior Art
A decoding apparatus for decoding a signal reproduced from an optical disc is known.
FIG. 11 is a block diagram of a prior art decoding apparatus for decoding a signal reproduced from an optical disc. In FIG. 11, an RF (radio wave frequency) signal reproduced from an optical disc is supplied a gain-controlled amplifier 11. The gain-controlled amplifier 11 amplifies the RF signal with its envelope level kept constant in accordance with a gain control signal. An output of the gain-controlled amplifier 11 is supplied to a waveform equalizing circuit 12. The waveform equalizing circuit 12 removes a waveform distortion caused by lack of transmission bandwidth, that is, waveform-shapes the output of the gain-controlled amplifier 11. A level detection and controlling circuit 13 compares an envelope level of an output of the waveform equalizing circuit 12 with a target value and generates a gain control signal to make the envelop level equal to the target value to control the gain of the gain controlled amplifier 11.
An output of the waveform equalizing circuit 12 is supplied to one input of an adder 14. A binary coding circuit 15 binary-codes the output of the adder 14 such that the output of the adder 14 compared with a center level to output a reproduced code stream. The reproduced code stream is also supplied to a PLL (Phase Locked Loop) circuit 17 and to an automatic slicer 16.
The automatic slicer 16 generates a level adjusting signal from the reproduced code stream and supplies it to another input of the adder 14 to adjust the center level of the output of adder to prevent binary-coding error caused by asymmetric waveforms which may be generated in accordance with a molding condition of the optical disc. The PLL circuit 17 generates a bit synchronizing clock from the reproduced code stream.
In this prior art decoding apparatus, the binary coding circuit only binary-codes the output of the adder 14 by comparing the output of the adder 14 with a center line level adjusted, so that if skew occurs in a relative angle between the optical pickup generating the RF signal and the optical disc, there is a tendency that the S/N ratio becomes insufficient.
Moreover, another prior art decoding apparatus including Viterbi decoder is known. FIG. 12 is a block diagram of such a prior art Viterbi decoder described in xe2x80x9cPIONEER RandDxe2x80x9d (Vol. 6. No. 2). In FIG. 12, a reproduced signal from an optical head is supplied to an a/d converter 101. An output of the a/d converter 101 supplied to a Viterbi decoder. The Viterbi decoder includes a branch metric operation circuit 102 for effecting a branch metric operation with the output of the a/d converter 101 and first to third prediction values to output a square error between the reproduced sample value and the first to third prediction values, a path metric operation circuit 103 for effecting a path metric operation, and a path memory 104 for storing an output of the path metric operation circuit 103.
The output of the Viterbi decoder is supplied to an eight/sixteen demodulator 105.
The a/d converter 101 a/d-converts the reproduced signal and limits peak values. The Viterbi decoder effects Viterbi decoding processing including the metric operation with only three fixed values of prediction data, that is high, zero, and low values to output a reproduced code stream.
In this prior art decoding apparatus, there is a problem in that the metric characteristic which the reproduced signal inherently has is insufficiently used.
The aim of the present invention is to provide an improved decoding apparatus.
According to the present invention, a first decoding apparatus for decoding a signal reproduced from an optical disc is provided which includes: a gain control circuit for controlling an envelope level of a waveform of the signal to a predetermined level; an waveform equalizing circuit having a frequency characteristic for waveform-equalizing the signal from the gain control circuit to remove reproduction waveform distortion of the signal, the frequency characteristic being changed in accordance with at least a tap coefficient; a binary coding circuit for binary-coding an output of the waveform equalizing circuit; a phase-locked-loop circuit for generating a bit synchronizing clock signal on the basis of an output of the binary coding circuit; an a/d converting circuit for a/d-converting an output of the waveform equalizing circuit in response to the bit synchronizing clock signal; a Viterbi decoding circuit including a metric operation circuit for Viterbi-decoding the output of the a/d converting circuit in response to the bit synchronizing clock signal to output a bit stream, the metric operation circuit generating a metric operation result from an output of the a/d-converting circuit and prediction data, the Viterbi decoding circuit Viterbi-decoding the output of the a/d converting circuit with the metric operation result; an operating circuit for operating an equalizing error from the output of a/d converting circuit and a waveform equalizing target value; a coefficient generation circuit for generating the tap coefficient from the equalizing error to minimize the equalizing error; and a circuit for operating the prediction data from the output of the a/d converting circuit.
According to the present invention, a second decoding apparatus for decoding a signal reproduced from an optical disc is provided which includes: an automatic gain control circuit for controlling an envelope level of a waveform of the signal to a predetermined level; a waveform equalizing circuit having a frequency characteristic for waveform-equalizing the signal from the automatic gain control circuit to remove reproduction waveform distortion of the signal, the frequency characteristic being changed in accordance with at least a tap coefficient; an a/d converting circuit for a/d-converting an output of the waveform equalizing circuit in response to a sampling clock signal; a bit clock operation and data estimating circuit responsive to said sampling clock signal for operating a bit synchronizing clock position from an output of the a/d converting circuit to generate a bit synchronizing clock signal and estimating a level of an output of the a/d converting circuit at the bit synchronizing clock position to output estimated data; a Viterbi decoding circuit including metric operation circuit for Viterbi-decoding the output of the a/d converting circuit in response to the bit synchronizing clock signal to output a bit stream, the metric operation circuit generating a metric operation result from an output of the a/d-converting circuit and prediction data, the Viterbi decoding circuit Viterbi-decoding the output of the a/d converting circuit with the metric operation result; an operating circuit for operating an equalizing error from the output of the a/d converting circuit and a waveform equalizing target value; a coefficient generation circuit for generating the tap coefficient from the equalizing error to minimize the equalizing error; and a circuit for operating the prediction data from the output of the a/d converting circuit.